PAL16L8
ICP16_new_pal_U49
VME-ICP16 VME BUFFER AND I/O BUFFER CONTROLLER
INTEGRATED SOLUTION INC., SAN JOSE, CA
LZA8 LZA9 /ZAS /I_O_DECODE VMEA1 LZA10 VMEA2 VMEA3 /ZVI_DEN GND /ZDS NC
BVMEA3 /SPRTCTL /FIFO /BVMEA1 /BVMEA2 /BUFFENA /I_O_WT VCC

IF (VCC) /FIFO = /ZAS*I_O_DECODE*LZA10
IF (VCC) /I_O_WT = /ZAS*I_O_DECODE*LZA10 + /ZAS*I_O_DECODE*LZA9
IF (VCC) /BUFFENA = ZVI_DEN*ZDS + I_O_DECODE*/LZA8*ZDS + SPRTCTL*ZDS
IF (VCC) /BVMEA1 = /VMEA1
IF (VCC) /BVMEA2 = /VMEA2
IF (VCC) /BVMEA3 = /VMEA3

DESCRIPTION

Equation 1 generates the FIFO chip enable signal.
Equation 2 assists in generating wait states for accesses to the FIFO of any
one of the DUARTs.
Equation 3 enables the LS245 buffers when one of the following I/O ports are
enabled:    1) VME interrupt vector (vmeiv*)
            2) printer status (ptrstat*)
            3) serial port control - modem (sprtctl*)
            4) uprdma1*
            5) uprdma2*.
Equations 4 through 6 act as buffers for the VME address bits 1 through 3.

