	.IF	LIST1
	.LIST
	.PAGE
	.ELSE
	.NOLIST
	.ENDC
;****************************************************************************
;
;	Variables & Constants.
;
;	File:	SAGE.PROM1.TEXT
;	Date:	 7-Nov-83
;	Issue:	3b
;
;	COPYRIGHT (c) 1982, 1983 SAGE Computer Technology
;	All Rights Reserved
;
;****************************************************************************
;
;	Release History:
;
;	1     13-Jun-82 Initial Release
;	2      8-Oct-82 Added BOOTFLGS & FT_TEST.  Moved PROMSIZE to
;			main file.
;	2a    27-Dec-82 Added version numbers.
;	3     23-Mar-83 Initial SAGE 4 release.
;	3a    24-May-83 Advanced version to 2.1.
;	3b     7-Nov-83 Advanced version to 2.2.
;
;****************************************************************************



.PAGE
;****************************************************************************
;
;	System constants:
;
;****************************************************************************

VERMAJ	.EQU	2		;Major version number
VERMIN	.EQU	2		;Minor version number


CR	.EQU	0DH		;ASCII carriage return character
LF	.EQU	0AH		;ASCII line feed character
BS	.EQU	08H		;ASCII backspace character
DEL	.EQU	7FH		;ASCII delete character
BELL	.EQU	07H		;ASCII Bell character

WI_BTTSZ.EQU	64.		;Number of bad track table entries

;	Delays in floppy disk driver (may be changed for full speed PROM)
DLY1	.EQU	174.		;1 Millisecond delay for FDCMD & FDSTAT
				;  (goes to 236. for full speed memory)
DLY2	.EQU	10.		;24 Microsecond delay for FDCMP & FDSTAT &
				;   FDREAD. (goes to 16 for full speed memory)
DLY3	.EQU	2		;1 Second loop for FDREAD.
				;  (goes to 3 for full speed memory)
DLY4	.EQU	2		;950 Millisecond delay in FDRECAL.
				;  (goes to 3 for full speed memory)
DLY5	.EQU	4		;580 Millisecond delay in FDINIT.
				;  (goes to 5 for full speed memory (550 Milli)
DLY6	.EQU	0FFFFH		;278 Millisecond delay in FDINIT.
				;  (stays same for full speed memory)
DLY7	.EQU	40.		;96 Microsecond delay for start of recalibrate
				;  and seek. (goes to 64 for full speed memory)
.PAGE
;****************************************************************************
;
;	Trap Vector Addresses:
;
;****************************************************************************

BE_TRAP .EQU	8		;Bus error vector
TR_TRAP .EQU	24H		;Trace vector
T1_TRAP .EQU	80H		;TRAP instruction vector 1


;****************************************************************************
;
;	Peripheral Addresses:
;	
;	All peripheral addresses will be accessed via the short absolute
;	addressing mode which is sign extended to 0FFC0xx.
;
;****************************************************************************

TERM_C	.EQU	0C073H		;Terminal USART control port
TERM_S	.EQU	0C073H		;Terminal USART status port
TERM_I	.EQU	0C071H		;Terminal USART character input port
TERM_O	.EQU	0C071H		;Terminal USART character output port

AUX1_C	.EQU	0C033H		;Auxillary USART #1 control port
AUX1_S	.EQU	0C033H		;Auxillary USART #1 status port
AUX1_I	.EQU	0C031H		;Auxillary USART #1 character input port
AUX1_O	.EQU	0C031H		;Auxillary USART #1 character output port

BAUD_C	.EQU	0C007H		;8253 baud rate control
BAUD1_D .EQU	0C003H		;Terminal baud rate data
BAUD2_D .EQU	0C005H		;Auxillary port baud rate data

DIPSWT	.EQU	0C021H		;DIP switch port

F8255	.EQU	0C027H		;8255 for floppy disk control

FD_MSR	.EQU	0C051H		;Floppy disk Master Status Register
FD_DATA .EQU	0C053H		;Floppy disk data register

CPARITY .EQU	0C067H		;Parity F/F
C8255	.EQU	0C061H		;Parallel port

;****************************************************************************
;
;	Winchester Ports
;
;****************************************************************************

WP_DATA .EQU	0C7C1H		;Winchester ram buffer data
WP_DTOA .EQU	0C5C1H		;Winchester D/A converter
WP_PGCC .EQU	0C783H		;Polynomial Generator Checker Command/Status
WP_PGCM .EQU	0C785H		;Polynomial Generator Checker Mode
WP_PGCB .EQU	0C787H		;Polynomial Generator Checker block check
WP_8253 .EQU	0C601H		;Winchester 8253 timer

WP_1A	.EQU	0C581H		;Winchester control port
WP_1B	.EQU	0C583H		;Winchester select port
WP_1C	.EQU	0C585H		;Winchester control port
WP_1CB	.EQU	0C587H		;above port addressed by bit

WP_2A	.EQU	0C501H		;Winchester control port
WP_2B	.EQU	0C503H		;Memory control port
WP_2C	.EQU	0C505H		;Winchester control port
WP_2CB	.EQU	0C507H		;above port addressed by bit

;	Bits on port WP_1A
WB_SKCMP.EQU	0		;Seek complete
WB_TRK0 .EQU	1		;Track 0 indicator
WB_WFALT.EQU	2		;Write fault
WB_INDEX.EQU	4		;Index pulse
WB_READY.EQU	5		;Drive ready flag
WB_WPROT.EQU	6		;Write Protect flag
WB_CHNG .EQU	7		;Cartridge changed flag

.PAGE
;****************************************************************************
;
;	Debugger RAM area Offsets.
;
;****************************************************************************

MEMTOP	.EQU	100H		;Size of RAM Memory (4 bytes)
				;(address of first unequipped location)
BUGBIOS .EQU	MEMTOP+4	;Flag to use BIOS Terminal I/O (1 byte)
				;(0 - use non-interrupt I/O, 1 - use BIOS)
				
BOOTFLGS.EQU	BUGBIOS+1	;Flags for use by bootstraps (1 byte)
				
REGTRAP .EQU	BOOTFLGS+1	;Register area for exception hander (64 bytes)
REGD	.EQU	REGTRAP		;D Registers
REGA	.EQU	REGD+32.	;A Registers
REGA5	.EQU	REGA+20.	;Register A5
REGA7	.EQU	REGA+28.	;Register A7 storage area

REGPC	.EQU	REGTRAP+64.	;Program Counter storage area (4 bytes)
REGUS	.EQU	REGPC+4.	;User Stack Pointer storage area (4 bytes)
REGSR	.EQU	REGUS+4.	;Status Register storage area (2 bytes)

BK0	.EQU	0		;Break point 0 active flag (unchange def)
BK1	.EQU	1		;Break point 1 active flag (unchange def)
BK2	.EQU	2		;Break point 2 active flag (unchange def)
UTRACE	.EQU	3		;Multiple tracing interuptable
GSBRK	.EQU	4		;Go subroutine break enabled
DSPREGS .EQU	5		;Print registers
TRACE	.EQU	6		;Trace bit of BMODE
BRKPT	.EQU	7		;Breakpoint bit of BMODE
BMODE	.EQU	REGSR+2		;Breakpoint mode (1 byte)
				;Bit 0 - Breakpoint set if 1
				;Bit 1 - Breakpoint 1 set if 1
				;Bit 2 - Breakpoint 2 set if 1
				;Bit 3 - Trace interuptable if 1
				;Bit 4 - Go Subroutine active bit
				;Bit 5 - Print registers bit
				;Bit 6 - Trace bit 
				;Bit 7 - Breakpoint bit
				
TRACECNT .EQU	BMODE+1		;Trace count (# inst to trace)
LOCCNTR .EQU	TRACECNT+1	;Location counter
MAXBASE .EQU	3		;Max # if base registers
BASEADDR .EQU	LOCCNTR+2	;Base registers
BASE0	.EQU	BASEADDR	;Base register 0
BASE1	.EQU	BASE0+4		;Base register 1
BASE2	.EQU	BASE1+4		;Base register 2

MAXBRKP	 .EQU	2		;Maximum break points - 1
BRKPOINT .EQU	BASE2+4		;Break point registers
BRKPNT0	 .EQU	BRKPOINT	;Break point register 0
BRKPNT1	 .EQU	BRKPNT0+4	;Break point register 1
BRKPNT2	 .EQU	BRKPNT1+4	;Break point register 2 (not accessible to user)
BRKCONT	 .EQU	BRKPNT2+4	;Break point location contents
BRKCON0	 .EQU	BRKCONT		;Break point register 0 location contents
BRKCON1	 .EQU	BRKCON0+2	;Break point register 1 location contents
BRKCON2	 .EQU	BRKCON1+2	;Break point register 2 location contents
BRKCOUNT .EQU	BRKCON2+2	;Break point pass count
BRKCNT0	 .EQU	BRKCOUNT	;Break point register 0 pass count
BRKCNT1	 .EQU	BRKCNT0+2	;Break point register 1 pass count
BRKEND	 .EQU	BRKCNT1+2	;Break point max pass count
BRKEND0	 .EQU	BRKEND		;Break point register 0 max pass count
BRKEND1	 .EQU	BRKEND0+2	;Break point register 1 max pass count

UNUSED1	 .EQU	BRKEND1+2	;UNUSED in this version

TTARRAY	 .EQU	UNUSED1+2	;Boolean array, which TRAPs to trace

LASTMEM	 .EQU	TTARRAY+2	;Last memory address displayed
LASTBASE .EQU	LASTMEM+4	;Last base register used for display

CURADDR	 .EQU	LASTBASE+2	;Current execution address (used by trace)

COLUMN	 .EQU	CURADDR+2	;Column number
CLINELEN .EQU	40.		;Input buffer size
CMNDLINE .EQU	COLUMN+2	;Command line input buffer

FC_GCMD .EQU	CMNDLINE+CLINELEN ;General floppy command area (10 bytes)

SAGE4	.EQU	FC_GCMD+10	;SAGE 4 flag (1 byte)

LDDEVIC .EQU	SAGE4+1		;Load device (1 byte)
				;  0 - terminal
				;  1 - auxillary serial port 1
				;  2 - auxillary serial port 2
				;  3 - auxillary serial port 3
				;  4 - auxillary serial port 4



FS_SR0	.EQU	LDDEVIC+1	;Floppy status register #0
FS_SR1	.EQU	FS_SR0+1	;Floppy status register #1
FS_SR2	.EQU	FS_SR1+1	;Floppy status register #2
FS_CYL	.EQU	FS_SR2+1	;Floppy status - cylinder number
FS_HEAD .EQU	FS_CYL+1	;Floppy status - head number
FS_SECT .EQU	FS_HEAD+1	;Floppy status - sector number
FS_BPS	.EQU	FS_SECT+1	;Floppy status - bytes per sector code
				;0 = 128 BPS, 1 = 256 BPS, 2 = 512 BPS

FS_ISR0 .EQU	FS_BPS+1	;Floppy interrupt status register #0
FS_ICYL .EQU	FS_ISR0+1	;Floppy sense interrupt cylinder

FS_ERR	.EQU	FS_ICYL+1	;Floppy status error number

FI_DRV0 .EQU	FS_ERR+1	;Floppy drive #2 information (8 bytes)
FI_DRV1 .EQU	FI_DRV0+8.	;Floppy drive #1 information (8 bytes)

;	Floppy transfer variables
FT_CYL	.EQU	FI_DRV1+8.	;Cylinder for transfer (1 byte)
FT_HEAD .EQU	FT_CYL+1	;Head for transfer (1 byte)
FT_SSEC .EQU	FT_HEAD+1	;Starting sector for transfer (1 byte)
FT_LSEC .EQU	FT_SSEC+1	;Last sector for transfer (1 byte)
FT_DIR	.EQU	FT_LSEC+1	;Direction (0=read,1=write) (1 byte)
FT_TEST .EQU	FT_DIR+1	;Test flags (1 byte)
FT_TCTR .EQU	FT_TEST+1	;Current transfer count (2 bytes)
FT_LBN	.EQU	FT_TCTR+2	;Logical Block Number (2 bytes)
FT_LENG .EQU	FT_LBN+2	;Total transfer length (4 bytes)
FT_MEMA .EQU	FT_LENG+4	;Memory address for transfer (4 bytes)
				
				;Next location is FT_MEMA+4



.PAGE
;****************************************************************************
;
;	Winchester Variable offsets 
;	 duplicate floppy addresses
;
;****************************************************************************


WI_BPS	.EQU	FC_GCMD		;Number of bytes per sector (2 bytes)
WI_STPCT.EQU	WI_BPS+2	;Step counter value (2 bytes)
WI_LOWC .EQU	WI_STPCT+2	;Low counter for read (2 bytes)
WI_HIGHC.EQU	WI_LOWC+2	;High counter for read (2 bytes)
WI_HEADS.EQU	WI_HIGHC+2	;Number of heads (1 byte)
WI_SPT	.EQU	WI_HEADS+1	;Number of sectors per track (1 byte)
WI_SELCT.EQU	WI_SPT+1	;Select bit (1 byte)
WG_INIT .EQU	WI_SELCT+1	;Controller initialized flag (1 byte)
WI_BASE .EQU	WG_INIT+1	;Base track of current partition (2 bytes)
WI_TOP	.EQU	WI_BASE+2	;Top track of current partition (2 bytes)

;	Operational information
WS_CCYL .EQU	WI_TOP+2	;Current cylinder (2 bytes)
WS_RCAL .EQU	WS_CCYL+2	;Recalibrate request (1 byte)
WS_ERR	.EQU	WS_RCAL+1	;Floppy status error (1 byte)
WS_RTRK .EQU	WS_ERR+1	;Track number during read (2 bytes)


;	Data splits here
;	I/O request information
WT_LBN	.EQU	FT_CYL		;Logical block number (4 bytes)
WT_LENG .EQU	WT_LBN+4	;Transfer length (4 bytes)
WT_MEMA .EQU	WT_LENG+4	;Transfer memory address (4 bytes)

;	Transfer variables
WT_LTN	.EQU	WT_MEMA+4	;Logical track number (2 bytes)
WT_CYL	.EQU	WT_LTN+2	;Cylinder address (2 bytes)
WT_HEAD .EQU	WT_CYL+2	;Head address (2 bytes)
WT_LEAD .EQU	WT_HEAD+2	;Number of words leading data in track (2 bytes)
WT_NUMB .EQU	WT_LEAD+2	;Number of data words in track (2 bytes)
WT_TRAIL.EQU	WT_NUMB+2	;Number of trailing words in track (2 bytes)
WT_RTRY .EQU	WT_TRAIL+2	;Retry count (1 byte)
WG_VCODA.EQU	WT_RTRY+1	;VCO setting for D/A converter (1 byte)
				
;	Global Winchester Driver Information
VCOCAL	.EQU	WG_VCODA+1	;VCO calibration value (2 bytes)
VCOVAL	.EQU	VCOCAL+2	;VCO count value (2 bytes)
WDRIVE	.EQU	VCOVAL+2	;Sub device for Winchester (1 byte)
				
				;*** One byte unused ***

BOOTNAME.EQU	WDRIVE+2	;Bootstrap name (9 bytes)
WT_SOFT .EQU	BOOTNAME+9	;Soft error counter (1 byte)
				
				;There is no more room here



WI_BTTBL.EQU	200H		;Bad track table (128 bytes)
SYSSTACK.EQU	400H		;Debugger system stack works down from 400H


.PAGE
;****************************************************************************
;
;	Floppy drive information offsets.
;
;	Allocates 8 bytes for each drive
;
;****************************************************************************

FI_SIDE .EQU	0		;Single sided = 0, Double sided = 1 (1 byte)
FI_NCYL .EQU	FI_SIDE+1	;Number of cylinders (1 byte)
FI_SPT	.EQU	FI_NCYL+1	;Number of sectors per track (1 byte)
FI_CCYL .EQU	FI_SPT+1	;Current cylinder (1 byte)
FI_DRV	.EQU	FI_CCYL+1	;Drive number (1 byte)
FI_GAP3 .EQU	FI_DRV+1	;Gap 3 parameter for controller (1 byte)
FI_BPS	.EQU	FI_GAP3+1	;Number of bytes per sector (2 bytes)
				;Next location is FI_BPS+2
				
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